Welcome to the Intel(R) C++ Compiler

 What's New in This Release

 Features and Benefits

 Product Web Site and Support

 System Requirements

 FLEXlm* Electronic Licensing

 About This Document

 How to Use This Document

 Related Publications

 Disclaimer

 Compiler Options Alphabetical Listing

 Compiler Options Quick Reference Guide

 Compiler Options by Functional Groups

 Customizing Compilation Process Options

 Alternate Tools and Locations

 Preprocessing Options

 Controlling Compilation Flow

 Controlling Compilation Output

 Debugging Options

 Diagnostics and Messages

 Language Conformance Options

 Conformance Options

 Application Performance Optimization Options

 Optimization-level Options

 Floating-point Arithmetic Precision

 Processor Dispatch Support (IA-32 only)

 Interprocedural Optimizations

 Profile-guided Optimizations

 High-level Language Optimizations

 Vectorization

 Compiler Options Cross-Reference for Windows* and Linux*

 Compiler Options Cross-reference

 Invoking the Intel(R) C++ Compiler

 Invoking the Compiler from the Command Line

 Running from the Command Line with make

 Default Behavior of the Compiler

 Compiler Input Files

 Compilation Phases

 Customizing the Compilation Environment

 Environment Variables

 Configuration Files

 Response Files

 Include Files

 Customizing Compilation Process Overview

 Specifying Alternate Tools and Paths

 Preprocessing

 Preprocessing Overview

 Preprocessing Only

 Searching for Include Files

 Defining Macros

 Compilation and Liking

 Compilation and Linking Overview

 Compiler Input and Output Options Summary

 Monitoring Compiler-generated Code

 Assembly File Code Example

 Linking

 Debugging

 Debugging Options Summary

 Preparing for Debugging

 Support for Symbolic Debugging

 Parsing for Syntax Only

 Conformance to the C Standard

 Conformance to the C++ Standard

 Optimization Levels

 Optimization-level Options

 Restricting Optimizations

 Floating-point Optimizations

 Floating-point Arithmetic Precision

 Maintaining Floating-point Arithmetic Precision, -mp

 Processor Dispatch Extensions Support (IA-32 only)

 Targeting a Processor and Extensions Support Overview

 Targeting a Processor (IA-32 only)

 Exclusive Specialized Code (IA-32 only)

 Specialized Code with -ax{i |M|K|W}

 Combining Processor Target and Dispatch Options (IA-32 only)

 Interprocedural Optimizations

 Interprocedural Optimizations (IPO)

 Multifile IPO

 Multifile IPO Overview

 Compilation with Real Object Files

 Creating a Multifile IPO Executable

 Creating a Multifile IPO Executable Using a Project Makefile

 Creating a Library from IPO Objects

 Analyzing the Effects of Multifile IPO

 Inline Expansion of Funtions

 Inline Expansion of Library Functions

 Controlling Inline Expansion of User Functions

 Criteria for Inline Function Expansion

 Interprocedural Optimizations with -Qoption

 Using -Qoptions Specificers

 Using -ip witn -Qoption

 Profile-guided Optimizations

 Profile-guided Optimizations Overview

 Profile-guided Optimizations Methodology

 PGO Environment Variables

 Basic Profile-guided Optimization Options

 Using Profile-guided Optimization

 Function Order List Usage Guidelines

 Utilities for Profile-guided Optimization

 High-level Language Optimizations (HLO)

 HLO Overview

 Loop Transformations

 Loop Unrolling

 Parallelization

 Parallelization with OpenMP*

 OpenMP* Standard Options

 OpenMP* Run Time Library Routines

 Intel Extensions to OpenMP*

 Vectorization (IA-32 only)

 Vectorization Overview

 Vectorizer Options

 Loop Structure Coding Background

 Vectorization Key Programming Guidelines

 Data Dependence

 Loop Constructs

 Loop Exit Conditions

 Types of Loops Vectorized

 Stripmining and Cleanup

 Statements in the Loop Body

 Vectorizable Data References

 Vectorization Examples

 Loop Interchange and Subscripts: Matrix Multiply

 For Additional Information

 Libraries Overview

 Default Libraries

 Intel(R) Shared Libraries

 Managing Libraries

 Diagnostic Overview

 Diagnostic Messages

 Language Diagnostics

 Suppressing Warning Messages with lint Comments

 Suppressing Warning Messages or Enabling Remarks

 Limiting the Number of Errors Reported

 Remark Messages

 Compiler Limits

 Compiler Limits

 Intel C++ Intrinsics Reference

 Overview of the Intrinsics

 Types of Intrinsics

 Benefits of Using Intrinsics

 Naming and Usage Syntax

 Intrinsics Implementation Across All IA

 Overview of Intrinsics For All IA

 Integer Arithmetic Related

 Floating-point Related

 String and Block Copy Related

 Miscellaneous Intrinsics

 MMX(TM) Technology Intrinsics

 Support for MMX(TM) Technology

 The EMMS Instruction: Why You Need It

 EMMS Usage Guidelines

 MMX(TM) Technology General Support Intrinsics

 MMX(TM) Technology Packed Arithmetic Intrinsics

 MMX(TM) Technology Shift Intrinsics

 MMX(TM) Technology Logical Intrinsics

 MMX(TM) Technology Compare Intrinsics

 MMX(TM) Technology Set Intrinsics

 Using MMX(TM) Technology Intrinsics on Itanium(TM) Architecture

 Streaming SIMD Extensions

 Intrinsics Support for Streaming SIMD Extensions

 Floating-point Intrinsics Using Streaming SIMD Extensions

 Arithmetic Operations for the Streaming SIMD Extensions

 Logical Operations for the Streaming SIMD Extensions

 Comparisons for the Streaming SIMD Extensions

 Conversion Operations for the Streaming SIMD Extensions

 Miscellaneous Intrinsics Using Streaming SIMD Extensions

 Macro Function for Shuffle Using Streaming SIMD Extensions

 Macro Functions to Read and Write the Control Registers

 Macro Function for Matrix Transposition

 Summary of Memory and Initialization Using Streaming SIMD Extensions

 Load Operations for the Streaming SIMD Extensions

 Set Operations for the Streaming SIMD Extensions

 Store Operations for the Streaming SIMD Extensions

 Integer Intrinsics Using Streaming SIMD Extensions

 Cacheability Support Using Streaming SIMD Extensions

 Using Streaming SIMD Extensions on Itanium(TM) Architecture

 Streaming SIMD Extensions 2

 Overview of Streaming SIMD Extensions 2 Intrinsics

 Floating Point Intrinsics

 Floating-point Operations for Streaming SIMD Extensions 2

 Logical Operations for Streaming SIMD Extensions 2

 Comparisons for Streaming SIMD Extensions 2

 Conversion Operations for Streaming SIMD Extensions 2

 Cacheability Support for Streaming SIMD Extensions 2

 Floating-point Memory and Initialization Operations

 Streaming SIMD Extensions 2 Floating-point Memory and Initialization Operations

 Load Operations for Streaming SIMD Extensions 2

 Set Operations for Streaming SIMD Extensions 2

 Store Operations for Streaming SIMD Extensions 2

 Miscellaneous Operations for Streaming SIMD Extensions 2

 Integer Intrinsics

 Integer Arithmetic Operations for Streaming SIMD Extensions 2

 Integer Logical Operations for Streaming SIMD Extensions 2

 Integer Shift Operations for Streaming SIMD Extensions 2

 Integer Comparison Operations for Streaming SIMD Extensions 2

 Conversions Operations for Streaming SIMD Extensions 2

 Macro Function for Shuffle

 Cacheability Support Operations for Streaming SIMD Extensions 2

 Integer Memory and Initialization Operations

 Streaming SIMD Extensions 2 Integer Memory and Initialization

 Load Operations for Streaming SIMD Extensions 2

 Set Operations for Streaming SIMD Extensions 2

 Store Operations for Streaming SIMD Extensions 2

 Miscellaneous Operations for Streaming SIMD Extensions 2

 Intrinsics for Itanium(TM) Instructions

 Overview: Intrinsics for Itanium(TM) Instructions

 Native Intrinsics for Itanium(TM) Instructions

 Lock and Atomic Operation Related Intrinsics

 Operating System Related Intrinsics

 Data Alignment, Memory Allocation Intrinsics, and Inline Assembly

 Overview of Data Alignment, Memory Allocation Intrinsics, and Inline Assembly

 Alignment Support

 Allocating and Freeing Aligned Memory Blocks

 Inline Assembly

 Intrinsics Cross-processor Implementation

 Intrinsics Cross-processor Implementation

 Intrinsics for Implementation Across All IA

 MMX(TM) Technology Intrinsics Implementation

 Streaming SIMD Extensions Intrinsics Implementation

 Streaming SIMD Extensions 2 Intrinsics Implementation

 Intel C++ Class Libraries

 Introduction to the Class Libraries

 Welcome to the Class Libraries

 Hardware and Software Requirements

 About the Classes

 Technical Overview

 Details About the Libraries

 C++ Classes and SIMD Operations

 Capabilities

 Integer Vector Classes

 Integer Vector Classes Overview

 Terms, Conventions, and Syntax

 Rules for Operators

 Assignment Operator

 Logical Operators

 Addition and Subtraction Operators

 Multiplication Operators

 Shift Operators

 Comparison Operators

 Conditional Select Operators

 Debug

 Unpack Operators

 Pack Operators

 Clear MMX(TM) Instructions State Operator

 Integer Intrinsics for Streaming SIMD Extensions

 Conversions Between Fvec and Ivec

 Floating-point Vector Classes

 Floating-point Vector Classes

 Fvec Notation Conventions

 Data Alignment

 Conversions

 Constructors and Initialization

 Arithmetic Operators

 Minimum and Maximum Operators

 Logical Operations

 Compare Operators

 Conditional Select Operators for Fvec Classes

 Cacheability Support Operations

 Debugging

 Load and Store Operators

 Unpack Operators for Fvec Operators

 Move Mask Operator

 Classes Quick Reference

 Programming Example