<<

e.g.
ecount
eE
ef
ef function,line,code-size
ef directives
ef directives define
effective
element
    Indicates
elements
ELF
ELF format
ELF formats
ELF object file formats
eliminate dependency violations
enables
    assembler
enclose
enclosed
enclosing
encoding
end
    bundle
    explicit bundle
    function
endp
endp directive
endp directive marks
endp directives
endp directives combine
enter
entries
Entry Annotation
Epilog counter 66
epilogue
epression operand
equal
equate
equate statements
    types
Equate statements enable
    programmer
Equate Statements sections
equated
equivalent
    instruction mnemonics
Equivalent Machine Instruction
errata
error
    assembler produces
errors
Escape Character
estoppel
exact
Example Code Sequence Using
Example Defining
    Alias Name
    Stacked Register
Example Using
    Memory Offset Annotation illustrates
    Predicate Vector Annotation
examples illustrate
    following
exception
Exchange comparison
executable sections
    NOP pattern
execute
    processor
executing
execution
    control
execution unit processes
    type
existing
    predicate relationships defined
    relations
expert
explain
explains
explicit
explicit-bundling
explicit-bundling mode
explicit-template directives
explicit bundle
    end
    shows
Explicit Bundling
explicit mode
explicit register
explicit register names
explicit selection
    template
Explicit Template Selection
Explicit Template Selection Directives
explicitly
explicitly assemble bundles
explicitly define stops
explicitly select
    specific template
explicitly specify
    size attribute
    symbol’s
exponent-part
expr
express
expression
expression assigned
    symbolic constant
expression defines
    separate
expression operand
expression operand specifies
    size
Expression Type
expressions
expressions reference
    location counter
expressions separated
external
    reference
External interrupt registers
external symbol
    reference
extr r1
extr.u r1



f0
f0,f3
f1
f127
f16-f31
f18
f2-f127
f2-f5
f2,f3
f2,f3,f4
f3
f3,f1,f0
f3,f1,f2
f3,f2
f3,f3
f3,f4
f3,f4,f0
f32;x
f33;x
f34
f35;y
f36
f37;z
f38;z
f39
f6
f8-f15
fabs
fadd.pc.sf
false
    instruction
familiar
fclass
    predefined constant representing
fclass Condition Predefined Operand Names
fclass Conditions
fclass.m.fctype p1,p2
fclass.m.unc p4
fclass.nm.fctype p1,p2
fcmp
fcmp.fcrel.fctype.sf p1,p2
fcvt.xuf
feature
features
February 2001
feed
FF
fframe
Fields
filename
filename Current filename
filename Identifies
filepath Current file
finding
    definition
finds dependency violations
First Characters
First Operand
fit
fitness
    warranties relating
FITNESS FOR ANY PARTICULAR PURPOSE
Fixed
Fixed-point
fixed frame size
fixed relation
fixed starting
Flag
    specify
    Use
flag attributes
flag character
Flag Characters
flagged
flags
flags listed
    assembler recognizes
flags operand
flags operand specifies
flags","type
float unsigned
    Convert integer
floating
floating-point
    alternate floating-point register names map
floating-point-constant
Floating-point add
floating-point constant contains
    following
Floating-point constants
Floating-point constants consist
Floating-point Registers
    0x42 mask
    rotf
floating-point registers x
Floating-point status register
fma.pc.sf f1
fmerge.ns f1
fmerge.s f1
fmpy.pc.sf
fms.pc.sf f1
fneg
fnegabs
fnorm.pc.sf
following
    alphabetical list defines
    attributes
    built-in symbols
    directive
    directives enable
    documents
    examples illustrate
    floating-point constant contains
    formal grammar summarizes
    format
    formats
    forms
    frame directives
    instruction
    Itanium™ architecture registers
    predicate registers
    region header directives
    registers
    sections
    sections detail
    syntax
    tables list
follows 1_000_000
foo
FOO_STACK_INDEX
forces
    assembler
Form feed
formal grammar summarizes
    following
format
    following
    illustrates
formats
    following
forms
    following
fpsr_gr
fpsr_psprel
fpsr_sprel
fpsr_when
fptr
fr_mem
fractional
fractional-part
frame directives
    following
fret0
fret7
frgr_mem
frgr_mem descriptor
    assembler produces
fst
fsub.pc.sf
function
    create
    end
    point
    Represents
function declared
    point
function defined
function descriptor
function entries
Function names
function symbol
    assembler creates
function’s actual
functionality
functionality.The annotations
functions



gated
General-purpose 64-bit registers
general-purpose register
general-purpose registers
    0x2 mask
General Registers
Generally, functions
Generates
    Relocation For
generation
    q
generation corresponds
generation older
generations
generations defined
    number
global
global name,name
global directive
global label
global labels
Global pointer
global r5#//declares label r5
global scope
Global Scope Declaration Directive
global symbol
Global symbols
    linkage editor
Glossary
gp
gp-relative offset
    calculates
gprel
gr-location
gr-location operand
gr_gr imask
gr_location
gr_mem descriptor
    assembler produces
gr_mem spill_imask
granted
grouped
grsave
grsave saves
    rp
guarantee alignment
    requests
guidelines
    prologue regions



handler
handlerdata
handlerdata directive
header
headers
hex
hexadecimal
Hexadecimal constants
hh
highest
highest consideration
holds
    symbol definition
hpux



IA-32
IAS ignores
ibr
ident
ident directive
Ident string directive
Ident string specification directive
identical contents
identifier
    length
    value
identifier1
identifier2
Identifiers
identifiers referring
identifies
    memory region
IEEE double-precision floating
IEEE extended
IEEE single-precision floating
ignored
ignores
illegal
illustrates
    format
    weak scope declaration
image
imagerel
imask descriptor
imm-brmask
imm-frmask
imm-grmask
imm-location
imm-mask
imm,r3
imm_context
imm_grmask
imm_location
imm14,r3
imm21
imm22
imm22,r0
imm22,r3
imm8
imm8,r
imm8,r3
immediate
immediate instruction
immediate instructions
immediate location
immediate mask
implemented
implication
implicit
implicit-bundling mode
Implicit Bundling
implicit operands
implicitly generated
implicitly specify
    default size attribute
implied
implied alignment boundary
    location counter
implied warranty
imply
imported
    pointers
improve readability
    numeric constant
in0
in95
include
    contents
Include File Directive
INCLUDING ANY WARRANTY OF MERCHANTABILITY
incompatibilities arising
incorporate
    ahead
incrementing
    index
increments appropriately
index
    incrementing
indicated offset relative
    set
Indicates
    boundary
    element
    MASM
    placeholder
    primary unat
    text
Indicates optional items
Indirect-register Files
Indirect file registers
individually bracketed
inf
Infinity
infringement
inins-1 represent r32
initialize
initialized
input
    assembler provides predefined alternate register names
    length
input registers
    Alternate names
ins
    r31+ins
ins+locals+outs
insert
    backslash
    comment
inserted
inserted anywhere
insertion
    point
inserts
    instruction
inst
instance
    Select
instances
instruction
    annotation affects
    boundaries
    cause
    conditional execution
    depending
    false
    follow
    inserts
    interprets
    refers
instruction aliasing
Instruction breakpoint registers
instruction brp.ret.sptk.imp b0,L
instruction bundling
Instruction Description
instruction executes normally
Instruction Groups
instruction mnemonic
    Represents
instruction mnemonic suffixes
instruction mnemonics
    equivalent
instruction operands
instruction operates on 64-bit
Instruction pointer
Instruction Set
Instruction Set Reference
instruction slot
    location
Instruction Statements
instruction syntax
instruction tag
    label
Instruction tags
Instruction translation registers
instruction types
    sequence
Instructions
    affect
    description
instructions belong
    declared
instructions brp.pp
instructions marked
Instructions subsequent
instructs
    linker
integer
    Represents
integer-part
integer constant specifying
Integer constants
integer instruction
Intel
Intel's Terms
Intel Architecture-32
Intel assumes
Intel Corporation
Intel disclaims
Intel literature
Intel processors associated
Intel products
Intel reserves
Intel’s
    name
Intel® Itanium™ Architecture Assembly Language Reference Guide
Intel® Itanium™ Architecture Software Developer's Manual
    Refer
Intel® Itanium™ Architecture Software Developer’s Manual
    Refer
Intel® Itanium™ Assembler
intellectual
intended
interpreted
interprets
    instruction
Interruption
Interruption frame
Interruption hash
Interruption immediat
Interruption instruction pointe
Interruption instruction previous
Interruption instruction translation register
Interruption processor status register
Interruption status register
Interruption vector
Interval
introduced
ip
iplt
ISA
italicized
    distinguish
italics
Itanium architecture
Itanium architecture assembly language
Itanium architecture assembly language directives
    Table Assembly Language Directives summarizes
Itanium architecture assembly language directives associated
    chapter describes
    describes
Itanium architecture assembly language statements
    chapter describes
Itanium architecture instructions
Itanium architecture provides
    mechanism
Itanium architecture psuedo operations
    Pseudo-ops lists
Itanium architecture registers
    following
    Type lists
Itanium processor
Itanium Processor Programmer's Guide
Itanium™ Assembly Language
items
    placeholder
    separates
items enclosed
iteration
    software-pipelined loop
itr


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