The conversions operations are listed in the following table followed by a description of each intrinsic with the most recent mnemonic naming convention. The alternate name is provided in case you have used these intrinsics before.
The prototypes for Streaming SIMD Extensions intrinsics are in the xmmintrin.h header file.
| Intrinsic Name |
Alternate Name |
Corresponding Instruction |
|---|---|---|
| _mm_cvt_ss2si | _mm_cvtss_si32 | CVTSS2SI |
| _mm_cvt_ps2pi | _mm_cvtps_pi32 | CVTPS2PI |
| _mm_cvtt_ss2si | _mm_cvttss_si32 | CVTTSS2SI |
| _mm_cvtt_ps2pi | _mm_cvttps_pi32 | CVTTPS2PI |
| _mm_cvt_si2ss | _mm_cvtsi32_ss | CVTSI2SS |
| _mm_cvt_pi2ps | _mm_cvtpi32_ps | CVTTPS2PI |
| _mm_cvtpi16_ps | composite | |
| _mm_cvtpu16_ps | composite | |
| _mm_cvtpi8_ps | composite | |
| _mm_cvtpu8_ps | composite | |
| _mm_cvtpi32x2_ps | composite | |
| _mm_cvtps_pi16 | composite | |
| _mm_cvtps_pi8 | composite |
int _mm_cvt_ss2si(__m128 a)
Convert the lower SP FP value of a to a 32-bit integer according to the current rounding mode.
r := (int)a0
__m64 _mm_cvt_ps2pi(__m128 a)
Convert the two lower SP FP values of a to two 32-bit integers according to the current rounding mode, returning the integers in packed form.
r0 := (int)a0
r1 := (int)a1
int _mm_cvtt_ss2si(__m128 a)
Convert the lower SP FP value of a to a 32-bit integer with truncation.
r := (int)a0
__m64 _mm_cvtt_ps2pi(__m128 a)
Convert the two lower SP FP values of a to two 32-bit integer with truncation, returning the integers in packed form.
r0 := (int)a0
r1 := (int)a1
__m128 _mm_cvt_si2ss(__m128, int)
Convert the 32-bit integer value b to an SP FP value; the upper three SP FP values are passed through from a.
r0 := (float)b
r1 := a1 ; r2 := a2 ; r3 := a3
__m128 _mm_cvt_pi2ps(__m128, __m64)
Convert the two 32-bit integer values in packed form in b to two SP FP values; the upper two SP FP values are passed through from a.
r0 := (float)b0
r1 := (float)b1
r2 := a2
r3 := a3
__inline __m128 _mm_cvtpi16_ps(__m64 a)
Convert the four 16-bit signed integer values in a to four single precision FP values.
r0 := (float)a0
r1 := (float)a1
r2 := (float)a2
r3 := (float)a3
__inline __m128 _mm_cvtpu16_ps(__m64 a)
Convert the four 16-bit unsigned integer values in a to four single precision FP values.
r0 := (float)a0
r1 := (float)a1
r2 := (float)a2
r3 := (float)a3
__inline __m128 _mm_cvtpi8_ps(__m64 a)
Convert the lower four 8-bit signed integer values in a to four single precision FP values.
r0 := (float)a0
r1 := (float)a1
r2 := (float)a2
r3 := (float)a3
__inline __m128 _mm_cvtpu8_ps(__m64 a)
Convert the lower four 8-bit unsigned integer values in a to four single precision FP values.
r0 := (float)a0
r1 := (float)a1
r2 := (float)a2
r3 := (float)a3
__inline __m128 _mm_cvtpi32x2_ps(__m64 a, __m64 b)
Convert the two 32-bit signed integer values in a and the two 32-bit signed integer values in b to four single precision FP values.
r0 := (float)a0
r1 := (float)a1
r2 := (float)b0
r3 := (float)b1
__inline __m64 _mm_cvtps_pi16(__m128 a)
Convert the four single precision FP values in a to four signed 16-bit integer values.
r0 := (short)a0
r1 := (short)a1
r2 := (short)a2
r3 := (short)a3
__inline __m64 _mm_cvtps_pi8(__m128 a)
Convert the four single precision FP values in a to the lower four signed 8-bit integer values of the result.
r0 := (char)a0
r1 := (char)a1
r2 := (char)a2
r3 := (char)a3